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<a href="#define-members">Macros</a> &#124;
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  <div class="headertitle"><div class="title">uart.h File Reference</div></div>
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<div class="textblock"><code>#include &quot;<a class="el" href="pico_8h_source.html">pico.h</a>&quot;</code><br />
<code>#include &quot;hardware/structs/uart.h&quot;</code><br />
<code>#include &quot;hardware/regs/dreq.h&quot;</code><br />
<code>#include &quot;hardware/regs/intctrl.h&quot;</code><br />
<code>#include &quot;<a class="el" href="rp2__common_2hardware__resets_2include_2hardware_2resets_8h_source.html">hardware/resets.h</a>&quot;</code><br />
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Include dependency graph for uart.h:</div>
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<p><a href="rp2__common_2hardware__uart_2include_2hardware_2uart_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
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Macros</h2></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PARAM_ASSERTIONS_ENABLED_HARDWARE_UART</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:a69d974c662aaef2a2dcc0bec15b578c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a916e19b286948c11c179145fb8ceb29b"><td class="memItemLeft" align="right" valign="top"><a id="a916e19b286948c11c179145fb8ceb29b" name="a916e19b286948c11c179145fb8ceb29b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PICO_UART_ENABLE_CRLF_SUPPORT</b>&#160;&#160;&#160;1</td></tr>
<tr class="separator:a916e19b286948c11c179145fb8ceb29b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3e9be3b2fecc2ac01f9686b4339184ad"><td class="memItemLeft" align="right" valign="top"><a id="a3e9be3b2fecc2ac01f9686b4339184ad" name="a3e9be3b2fecc2ac01f9686b4339184ad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PICO_UART_DEFAULT_CRLF</b>&#160;&#160;&#160;0</td></tr>
<tr class="separator:a3e9be3b2fecc2ac01f9686b4339184ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9d632e2b9ebe40f979efa3ca340aaddc"><td class="memItemLeft" align="right" valign="top"><a id="a9d632e2b9ebe40f979efa3ca340aaddc" name="a9d632e2b9ebe40f979efa3ca340aaddc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>PICO_DEFAULT_UART_BAUD_RATE</b>&#160;&#160;&#160;115200</td></tr>
<tr class="memdesc:a9d632e2b9ebe40f979efa3ca340aaddc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Default baud rate. <br /></td></tr>
<tr class="separator:a9d632e2b9ebe40f979efa3ca340aaddc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga12815b6262573d95c8a749f64cc85284"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga12815b6262573d95c8a749f64cc85284">UART_NUM</a>(uart)</td></tr>
<tr class="memdesc:ga12815b6262573d95c8a749f64cc85284"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the UART number for a UART instance.  <a href="group__hardware__uart.html#ga12815b6262573d95c8a749f64cc85284">More...</a><br /></td></tr>
<tr class="separator:ga12815b6262573d95c8a749f64cc85284"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc5c5947dc577aac3d448fdb37647927"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gadc5c5947dc577aac3d448fdb37647927">UART_INSTANCE</a>(num)</td></tr>
<tr class="memdesc:gadc5c5947dc577aac3d448fdb37647927"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the UART instance with the given UART number.  <a href="group__hardware__uart.html#gadc5c5947dc577aac3d448fdb37647927">More...</a><br /></td></tr>
<tr class="separator:gadc5c5947dc577aac3d448fdb37647927"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga10472af6afab1cb220b5fbd4aee63a16"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga10472af6afab1cb220b5fbd4aee63a16">UART_DREQ_NUM</a>(uart,  is_tx)</td></tr>
<tr class="memdesc:ga10472af6afab1cb220b5fbd4aee63a16"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a> used for pacing DMA transfers to or from this UART instance. If is_tx is true, then it is for transfers to the UART else for transfers from the UART.  <a href="group__hardware__uart.html#ga10472af6afab1cb220b5fbd4aee63a16">More...</a><br /></td></tr>
<tr class="separator:ga10472af6afab1cb220b5fbd4aee63a16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b4f387572a62cc839eb004ce7c02e3f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga8b4f387572a62cc839eb004ce7c02e3f">UART_CLOCK_NUM</a>(uart)</td></tr>
<tr class="memdesc:ga8b4f387572a62cc839eb004ce7c02e3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns <a class="el" href="group__hardware__clocks.html#ga824c11c2ae315e0b745f6dd3db936788">clock_num_t</a> of the clock for the given UART instance.  <a href="group__hardware__uart.html#ga8b4f387572a62cc839eb004ce7c02e3f">More...</a><br /></td></tr>
<tr class="separator:ga8b4f387572a62cc839eb004ce7c02e3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7bceb145d3739e3923f64584eff6db59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga7bceb145d3739e3923f64584eff6db59">UART_FUNCSEL_NUM</a>(uart,  gpio)</td></tr>
<tr class="memdesc:ga7bceb145d3739e3923f64584eff6db59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns <a class="el" href="group__hardware__gpio.html#ga89b8e5e8a9c515260dea8d1fa96e72c9">gpio_function_t</a> needed to select the UART function for the given UART instance on the given GPIO number.  <a href="group__hardware__uart.html#ga7bceb145d3739e3923f64584eff6db59">More...</a><br /></td></tr>
<tr class="separator:ga7bceb145d3739e3923f64584eff6db59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8697ddad82a2cd5d889ce819d83783e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga8697ddad82a2cd5d889ce819d83783e3">UART_IRQ_NUM</a>(uart)</td></tr>
<tr class="memdesc:ga8697ddad82a2cd5d889ce819d83783e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the <a class="el" href="group__hardware__irq.html#gaf30862f51b5994ffd5863176a185d137">irq_num_t</a> for processor interrupts from the given UART instance.  <a href="group__hardware__uart.html#ga8697ddad82a2cd5d889ce819d83783e3">More...</a><br /></td></tr>
<tr class="separator:ga8697ddad82a2cd5d889ce819d83783e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffef755f98d8fcec5f7b5147924fb4f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gaffef755f98d8fcec5f7b5147924fb4f9">UART_RESET_NUM</a>(uart)</td></tr>
<tr class="memdesc:gaffef755f98d8fcec5f7b5147924fb4f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the <a class="el" href="group__hardware__resets.html#ga53804b75cce5eb3090d482b0af2a7ce0">reset_num_t</a> used to reset a given UART instance.  <a href="group__hardware__uart.html#gaffef755f98d8fcec5f7b5147924fb4f9">More...</a><br /></td></tr>
<tr class="separator:gaffef755f98d8fcec5f7b5147924fb4f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader"></div></td></tr>
<tr class="memitem:ga4c45ff280c79aa60358d8241b7e5824b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga4c45ff280c79aa60358d8241b7e5824b">uart0</a>&#160;&#160;&#160;((uart_inst_t *)uart0_hw)</td></tr>
<tr class="memdesc:ga4c45ff280c79aa60358d8241b7e5824b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Identifier for UART instance 0.  <a href="group__hardware__uart.html#ga4c45ff280c79aa60358d8241b7e5824b">More...</a><br /></td></tr>
<tr class="separator:ga4c45ff280c79aa60358d8241b7e5824b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad94ac6d5e345a1f794174d9bb7c6f69c"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>uart1</b>&#160;&#160;&#160;((uart_inst_t *)uart1_hw)</td></tr>
<tr class="memdesc:gad94ac6d5e345a1f794174d9bb7c6f69c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Identifier for UART instance 1. <br /></td></tr>
<tr class="separator:gad94ac6d5e345a1f794174d9bb7c6f69c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:a3920e2bf2b198420bbaa5a758a4001aa"><td class="memItemLeft" align="right" valign="top"><a id="a3920e2bf2b198420bbaa5a758a4001aa" name="a3920e2bf2b198420bbaa5a758a4001aa"></a>
typedef struct uart_inst&#160;</td><td class="memItemRight" valign="bottom"><b>uart_inst_t</b></td></tr>
<tr class="separator:a3920e2bf2b198420bbaa5a758a4001aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga6bcc37e31dd40c204b4ac6f6189e8878"><td class="memItemLeft" align="right" valign="top"><a id="ga6bcc37e31dd40c204b4ac6f6189e8878" name="ga6bcc37e31dd40c204b4ac6f6189e8878"></a>enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga6bcc37e31dd40c204b4ac6f6189e8878">uart_parity_t</a> { <b>UART_PARITY_NONE</b>
, <b>UART_PARITY_EVEN</b>
, <b>UART_PARITY_ODD</b>
 }</td></tr>
<tr class="memdesc:ga6bcc37e31dd40c204b4ac6f6189e8878"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART Parity enumeration. <br /></td></tr>
<tr class="separator:ga6bcc37e31dd40c204b4ac6f6189e8878"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga064c5c42afff8712a612d7ae50a58484"><td class="memItemLeft" align="right" valign="top">static uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga064c5c42afff8712a612d7ae50a58484">uart_get_index</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga064c5c42afff8712a612d7ae50a58484"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convert UART instance to hardware instance number.  <a href="group__hardware__uart.html#ga064c5c42afff8712a612d7ae50a58484">More...</a><br /></td></tr>
<tr class="separator:ga064c5c42afff8712a612d7ae50a58484"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd9aaeaae78307db7f51aa39f501b972"><td class="memItemLeft" align="right" valign="top">static uart_inst_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gafd9aaeaae78307db7f51aa39f501b972">uart_get_instance</a> (uint num)</td></tr>
<tr class="memdesc:gafd9aaeaae78307db7f51aa39f501b972"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the UART instance from an instance number.  <a href="group__hardware__uart.html#gafd9aaeaae78307db7f51aa39f501b972">More...</a><br /></td></tr>
<tr class="separator:gafd9aaeaae78307db7f51aa39f501b972"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga460772353a17df99adaf3352115c73d5"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="structuart__hw__t.html">uart_hw_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga460772353a17df99adaf3352115c73d5">uart_get_hw</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga460772353a17df99adaf3352115c73d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the real hardware UART instance from a UART instance.  <a href="group__hardware__uart.html#ga460772353a17df99adaf3352115c73d5">More...</a><br /></td></tr>
<tr class="separator:ga460772353a17df99adaf3352115c73d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a55924eff530aff6db3b15fd872cda4"><td class="memItemLeft" align="right" valign="top">uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga5a55924eff530aff6db3b15fd872cda4">uart_init</a> (uart_inst_t *uart, uint baudrate)</td></tr>
<tr class="memdesc:ga5a55924eff530aff6db3b15fd872cda4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialise a UART.  <a href="group__hardware__uart.html#ga5a55924eff530aff6db3b15fd872cda4">More...</a><br /></td></tr>
<tr class="separator:ga5a55924eff530aff6db3b15fd872cda4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85b12f7d19f5087b22f26473039d2c4f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga85b12f7d19f5087b22f26473039d2c4f">uart_deinit</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga85b12f7d19f5087b22f26473039d2c4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">DeInitialise a UART.  <a href="group__hardware__uart.html#ga85b12f7d19f5087b22f26473039d2c4f">More...</a><br /></td></tr>
<tr class="separator:ga85b12f7d19f5087b22f26473039d2c4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab7f2ad3380a44597d8dda42b2d2ddef9"><td class="memItemLeft" align="right" valign="top">uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gab7f2ad3380a44597d8dda42b2d2ddef9">uart_set_baudrate</a> (uart_inst_t *uart, uint baudrate)</td></tr>
<tr class="memdesc:gab7f2ad3380a44597d8dda42b2d2ddef9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set UART baud rate.  <a href="group__hardware__uart.html#gab7f2ad3380a44597d8dda42b2d2ddef9">More...</a><br /></td></tr>
<tr class="separator:gab7f2ad3380a44597d8dda42b2d2ddef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga54a9e298ebec96510e324bbab01247c7"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga54a9e298ebec96510e324bbab01247c7">uart_set_hw_flow</a> (uart_inst_t *uart, bool cts, bool rts)</td></tr>
<tr class="memdesc:ga54a9e298ebec96510e324bbab01247c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set UART flow control CTS/RTS.  <a href="group__hardware__uart.html#ga54a9e298ebec96510e324bbab01247c7">More...</a><br /></td></tr>
<tr class="separator:ga54a9e298ebec96510e324bbab01247c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga07e3c6ce7c1abf5e875b62964b8f841e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga07e3c6ce7c1abf5e875b62964b8f841e">uart_set_format</a> (uart_inst_t *uart, uint data_bits, uint stop_bits, <a class="el" href="group__hardware__uart.html#ga6bcc37e31dd40c204b4ac6f6189e8878">uart_parity_t</a> parity)</td></tr>
<tr class="memdesc:ga07e3c6ce7c1abf5e875b62964b8f841e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set UART data format.  <a href="group__hardware__uart.html#ga07e3c6ce7c1abf5e875b62964b8f841e">More...</a><br /></td></tr>
<tr class="separator:ga07e3c6ce7c1abf5e875b62964b8f841e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1908247cb5f2468517b37d5a91798181"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga1908247cb5f2468517b37d5a91798181">uart_set_irqs_enabled</a> (uart_inst_t *uart, bool rx_has_data, bool tx_needs_data)</td></tr>
<tr class="memdesc:ga1908247cb5f2468517b37d5a91798181"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable/Disable UART interrupt outputs.  <a href="group__hardware__uart.html#ga1908247cb5f2468517b37d5a91798181">More...</a><br /></td></tr>
<tr class="separator:ga1908247cb5f2468517b37d5a91798181"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8c0c74c65b12281345886829a15c031f"><td class="memItemLeft" align="right" valign="top"><a id="a8c0c74c65b12281345886829a15c031f" name="a8c0c74c65b12281345886829a15c031f"></a>
static void&#160;</td><td class="memItemRight" valign="bottom"><b>uart_set_irq_enables</b> (uart_inst_t *uart, bool rx_has_data, bool tx_needs_data)</td></tr>
<tr class="separator:a8c0c74c65b12281345886829a15c031f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6397bfad56e634a2ab31b6953a44caa7"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga6397bfad56e634a2ab31b6953a44caa7">uart_is_enabled</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga6397bfad56e634a2ab31b6953a44caa7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Test if specific UART is enabled.  <a href="group__hardware__uart.html#ga6397bfad56e634a2ab31b6953a44caa7">More...</a><br /></td></tr>
<tr class="separator:ga6397bfad56e634a2ab31b6953a44caa7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3daee9514dacfb76f3c04b131e2e41a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gac3daee9514dacfb76f3c04b131e2e41a">uart_set_fifo_enabled</a> (uart_inst_t *uart, bool enabled)</td></tr>
<tr class="memdesc:gac3daee9514dacfb76f3c04b131e2e41a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable/Disable the FIFOs on specified UART.  <a href="group__hardware__uart.html#gac3daee9514dacfb76f3c04b131e2e41a">More...</a><br /></td></tr>
<tr class="separator:gac3daee9514dacfb76f3c04b131e2e41a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d307ef71e3ce632be03bfd9bbe68117"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga9d307ef71e3ce632be03bfd9bbe68117">uart_is_writable</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga9d307ef71e3ce632be03bfd9bbe68117"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if space is available in the TX FIFO.  <a href="group__hardware__uart.html#ga9d307ef71e3ce632be03bfd9bbe68117">More...</a><br /></td></tr>
<tr class="separator:ga9d307ef71e3ce632be03bfd9bbe68117"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff99ad133c2c808b69d1e12054c09f4a"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gaff99ad133c2c808b69d1e12054c09f4a">uart_tx_wait_blocking</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:gaff99ad133c2c808b69d1e12054c09f4a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait for the UART TX fifo to be drained.  <a href="group__hardware__uart.html#gaff99ad133c2c808b69d1e12054c09f4a">More...</a><br /></td></tr>
<tr class="separator:gaff99ad133c2c808b69d1e12054c09f4a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4752e5d03dd98a08d95705f68784fd15"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga4752e5d03dd98a08d95705f68784fd15">uart_is_readable</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga4752e5d03dd98a08d95705f68784fd15"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine whether data is waiting in the RX FIFO.  <a href="group__hardware__uart.html#ga4752e5d03dd98a08d95705f68784fd15">More...</a><br /></td></tr>
<tr class="separator:ga4752e5d03dd98a08d95705f68784fd15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada6a512414b1113a59725ddfbe23c4a5"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gada6a512414b1113a59725ddfbe23c4a5">uart_write_blocking</a> (uart_inst_t *uart, const uint8_t *src, size_t len)</td></tr>
<tr class="memdesc:gada6a512414b1113a59725ddfbe23c4a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write to the UART for transmission.  <a href="group__hardware__uart.html#gada6a512414b1113a59725ddfbe23c4a5">More...</a><br /></td></tr>
<tr class="separator:gada6a512414b1113a59725ddfbe23c4a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8a066ef7339e7b22f05049435469234"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gae8a066ef7339e7b22f05049435469234">uart_read_blocking</a> (uart_inst_t *uart, uint8_t *dst, size_t len)</td></tr>
<tr class="memdesc:gae8a066ef7339e7b22f05049435469234"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read from the UART.  <a href="group__hardware__uart.html#gae8a066ef7339e7b22f05049435469234">More...</a><br /></td></tr>
<tr class="separator:gae8a066ef7339e7b22f05049435469234"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64aa17c4b4382a59f7cb80c94f339d56"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga64aa17c4b4382a59f7cb80c94f339d56">uart_putc_raw</a> (uart_inst_t *uart, char c)</td></tr>
<tr class="memdesc:ga64aa17c4b4382a59f7cb80c94f339d56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write single character to UART for transmission.  <a href="group__hardware__uart.html#ga64aa17c4b4382a59f7cb80c94f339d56">More...</a><br /></td></tr>
<tr class="separator:ga64aa17c4b4382a59f7cb80c94f339d56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21c2cc29dcdc99ad970024dca52665a5"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga21c2cc29dcdc99ad970024dca52665a5">uart_putc</a> (uart_inst_t *uart, char c)</td></tr>
<tr class="memdesc:ga21c2cc29dcdc99ad970024dca52665a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write single character to UART for transmission, with optional CR/LF conversions.  <a href="group__hardware__uart.html#ga21c2cc29dcdc99ad970024dca52665a5">More...</a><br /></td></tr>
<tr class="separator:ga21c2cc29dcdc99ad970024dca52665a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga94be41517216933ca961fd0464f74a6c"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga94be41517216933ca961fd0464f74a6c">uart_puts</a> (uart_inst_t *uart, const char *s)</td></tr>
<tr class="memdesc:ga94be41517216933ca961fd0464f74a6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write string to UART for transmission, doing any CR/LF conversions.  <a href="group__hardware__uart.html#ga94be41517216933ca961fd0464f74a6c">More...</a><br /></td></tr>
<tr class="separator:ga94be41517216933ca961fd0464f74a6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga652497b933112c1759f892a03c657fec"><td class="memItemLeft" align="right" valign="top">static char&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga652497b933112c1759f892a03c657fec">uart_getc</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga652497b933112c1759f892a03c657fec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read a single character from the UART.  <a href="group__hardware__uart.html#ga652497b933112c1759f892a03c657fec">More...</a><br /></td></tr>
<tr class="separator:ga652497b933112c1759f892a03c657fec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaddb01507886acab5604a2eecc014b388"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gaddb01507886acab5604a2eecc014b388">uart_set_break</a> (uart_inst_t *uart, bool en)</td></tr>
<tr class="memdesc:gaddb01507886acab5604a2eecc014b388"><td class="mdescLeft">&#160;</td><td class="mdescRight">Assert a break condition on the UART transmission.  <a href="group__hardware__uart.html#gaddb01507886acab5604a2eecc014b388">More...</a><br /></td></tr>
<tr class="separator:gaddb01507886acab5604a2eecc014b388"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ea0b7b9252cd22e2395ca6070000f7a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga4ea0b7b9252cd22e2395ca6070000f7a">uart_set_translate_crlf</a> (uart_inst_t *uart, bool translate)</td></tr>
<tr class="memdesc:ga4ea0b7b9252cd22e2395ca6070000f7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set CR/LF conversion on UART.  <a href="group__hardware__uart.html#ga4ea0b7b9252cd22e2395ca6070000f7a">More...</a><br /></td></tr>
<tr class="separator:ga4ea0b7b9252cd22e2395ca6070000f7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa85ae059028b3f38e612e55042a8272"><td class="memItemLeft" align="right" valign="top">
static void&#160;</td><td class="memItemRight" valign="bottom"><b>uart_default_tx_wait_blocking</b> (void)</td></tr>
<tr class="memdesc:gaaa85ae059028b3f38e612e55042a8272"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait for the default UART's TX FIFO to be drained. <br /></td></tr>
<tr class="separator:gaaa85ae059028b3f38e612e55042a8272"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga026539f355b6c6f5a044a5f4ee051f0e"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga026539f355b6c6f5a044a5f4ee051f0e">uart_is_readable_within_us</a> (uart_inst_t *uart, uint32_t us)</td></tr>
<tr class="memdesc:ga026539f355b6c6f5a044a5f4ee051f0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait for up to a certain number of microseconds for the RX FIFO to be non empty.  <a href="group__hardware__uart.html#ga026539f355b6c6f5a044a5f4ee051f0e">More...</a><br /></td></tr>
<tr class="separator:ga026539f355b6c6f5a044a5f4ee051f0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee105a6aeabd79da9244a098865e28cd"><td class="memItemLeft" align="right" valign="top">static uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#gaee105a6aeabd79da9244a098865e28cd">uart_get_dreq_num</a> (uart_inst_t *uart, bool is_tx)</td></tr>
<tr class="memdesc:gaee105a6aeabd79da9244a098865e28cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Return the <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a> to use for pacing transfers to/from a particular UART instance.  <a href="group__hardware__uart.html#gaee105a6aeabd79da9244a098865e28cd">More...</a><br /></td></tr>
<tr class="separator:gaee105a6aeabd79da9244a098865e28cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0759dec413fb5af3bcaa9691ba98bcb9"><td class="memItemLeft" align="right" valign="top">static uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__uart.html#ga0759dec413fb5af3bcaa9691ba98bcb9">uart_get_reset_num</a> (uart_inst_t *uart)</td></tr>
<tr class="memdesc:ga0759dec413fb5af3bcaa9691ba98bcb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Return the <a class="el" href="group__hardware__resets.html#ga53804b75cce5eb3090d482b0af2a7ce0">reset_num_t</a> to use for pacing transfers to/from a particular UART instance.  <a href="group__hardware__uart.html#ga0759dec413fb5af3bcaa9691ba98bcb9">More...</a><br /></td></tr>
<tr class="separator:ga0759dec413fb5af3bcaa9691ba98bcb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7cd621d6d0899680209f542d41ff892"><td class="memItemLeft" align="right" valign="top"><a id="af7cd621d6d0899680209f542d41ff892" name="af7cd621d6d0899680209f542d41ff892"></a>
static uint&#160;</td><td class="memItemRight" valign="bottom"><b>uart_get_dreq</b> (uart_inst_t *uart, bool is_tx)</td></tr>
<tr class="separator:af7cd621d6d0899680209f542d41ff892"><td class="memSeparator" colspan="2">&#160;</td></tr>
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